19.5.3.3.2 Standby Mode

The Standby mode is the lowest power configuration while keeping the state of the logic and the content of the SRAM.

This mode depends on (As depicted in the previous table):

  • The peripherals running in standby and requesting their asynchronous GCLK clock or their synchronous AHB/APB clock
  • The RUNSTDBY bit of the GCLK generators
  • The RUNSTDBY/ONDEMAND bit combination of the clock sources

Each clock source and GCLK generator can be:

  • Stopped during the whole standby
  • Running during the whole standby
  • Automatically woken up and switched off depending on the clocks requested by the peripherals during standby (SleepWalking). For example, a peripheral can run during standby and request its GCLK asynchronous clock, which will wake up the related GCLK and clock source. Another peripheral may request its APB clock, which will wake up the MCLK, GCLK generator 0 and the related clock source running. (In this case the other AHB/APB clocks are kept gated at the MCLK output).

As described above, depending on the configuration, the current consumption of the device in Standby mode can be slightly different.

All features that don’t require CPU intervention are supported in Standby mode. Here are examples:

  • Autonomous peripherals features.
  • Features relying on Event System allowing autonomous communication between peripherals.
  • Features relying on on-demand clock.
  • DMA transfers.

Entering Standby mode: This mode is entered by setting SLEEPCFG.SLEEPMODE = STANDBY and by executing the WFI instruction. The SLEEPONEXIT feature is also available as in Idle mode.

Exiting Standby mode: Any peripheral able to generate an asynchronous interrupt can wake up the system. For example, a peripheral running on a GCLK clock can trigger an interrupt. When the enabled asynchronous wake-up event occurs and the system is woken up, the device will either execute the interrupt service routine or continue the normal program execution according to the Priority Mask Register (PRIMASK) configuration of the CPU.