7.7.6.15 ASRC Direct Access Valid Channel Register
This register can only be written if the WPEN bit is cleared in ASRC_WPMR.
Note: The Direct Access mode related
configurations (ASRC_DAVCR.DAxCHy must be programmed prior to enabling the channels in
ASRC_MR.ASRCENx.
| Name: | ASRC_DAVCR |
| Offset: | 0xAC |
| Reset: | 0xFFFFFFFF |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| DA3CH7 | DA3CH6 | DA3CH5 | DA3CH4 | DA3CH3 | DA3CH2 | DA3CH1 | DA3CH0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| DA2CH7 | DA2CH6 | DA2CH5 | DA2CH4 | DA2CH3 | DA2CH2 | DA2CH1 | DA2CH0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| DA1CH7 | DA1CH6 | DA1CH5 | DA1CH4 | DA1CH3 | DA1CH2 | DA1CH1 | DA1CH0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DA0CH7 | DA0CH6 | DA0CH5 | DA0CH4 | DA0CH3 | DA0CH2 | DA0CH1 | DA0CH0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Bits 24, 25, 26, 27, 28, 29, 30, 31 – DA3CHx Direct Access Input Stream 3 Channel x Selection
| Value | Description |
|---|---|
| 0 | The channel x of the direct access input stream 3 is not passed to any DSP |
| 1 | The channel x of the direct access input stream 3 is converted by a DSP. |
Bits 16, 17, 18, 19, 20, 21, 22, 23 – DA2CHx Direct Access Input Stream 2 Channel x Selection
| Value | Description |
|---|---|
| 0 | The channel x of the direct access input stream 2 is not passed to any DSP |
| 1 | The channel x of the direct access input stream 2 is converted by a DSP. |
Bits 8, 9, 10, 11, 12, 13, 14, 15 – DA1CHx Direct Access Input Stream 1 Channel x Selection
| Value | Description |
|---|---|
| 0 | The channel x of the direct access input stream 1 is not passed to any DSP |
| 1 | The channel x of the direct access input stream 1 is converted by a DSP. |
Bits 0, 1, 2, 3, 4, 5, 6, 7 – DA0CHx Direct Access Input Stream 0 Channel x Selection
| Value | Description |
|---|---|
| 0 | The channel x of the direct access input stream 0 is not passed to any DSP |
| 1 | The channel x of the direct access input stream 0 is converted by a DSP. |