31.1.12.2 PFM Single or Dual Panel Erase
For a dual panel system, the Upper PFM erase NVMOP command erases the PFM in the panel mapped to the Upper PFM address range. Lower PFM erase NVMOP command erases the PFM in the panel mapped to the Lower PFM address range. These commands leave the BFM and CFM pages intact, and are intended to be used by a field upgradeable device. To guard against accidental erasure user code can setup PWP for protection.
The ability to erase the PFM in the Upper or Lower region allows executing from one panel while erasing (or writing) the other, without the need to complete many Page Erase operations.
The PFM Erase operation is not address based (i.e. the FCW directly selects the target flash panel). The ADDR register is ignored so does not need to be initialized for this NVMOP.
A Panel Erase sequence comprises the following steps:
- <Desired NVMOP> is Upper or Lower PFM Erase.
- Follow the Start Sequencer from Start Sequencer.
- Wait for NVM Interrupt from Interrupts.
- Check the INTFLAG bits to ensure that the program sequence completed successfully, and then clear all bits in INTFLAG. See Errors and Flags about error flags.
The Flash memory in a panel mapped to the Upper or Lower PFM region can be erased if write protection is not enabled for addresses associated with that region, see Debug Access Level.
If in mission mode, the application must NOT be executing from the erased region. If any initiator reads from the panel containing the region being erased, all Flash accesses are stalled until the erase completes.
Program Erase Timing
Program Erase timing is dominated by setup (Tnvs), erase time (Terase) and recovery (Trcv) delays.
Program Erase = 2 * (Tnvs + Terase + Trcv + Trw)