31.1.10.1 PFM Write Protect (PWP)
The PWP register provides write/erase protection for a region in PFM using PWPn.BASE and PWPn.SIZE. BASE is the flash physical address of the start of the region to be protected. BASE is aligned to the page size of the flash panel. SIZE is the number of pages to be protected. There are 4 regions that can be protected.
Protection can be enabled or disabled using PWPn.PWPEN bit. However, any address range not defined by PWPn is not protected. When PWP regions with different protections overlap, the one with the more restrictive wins. Because of this, overlapping regions are not useful.
See the Interrupt Flag Summary Table for the effects of write protect errors on INTFLAG.
PFM Write Protect Mirror
With dual panel systems PWP can be mirrored from the Lower PFM to the Upper PFM OR from the Upper PFM to the Lower PFM. When PWPn.PWPMIR = 1, PWPn is applied to both Upper and Lower PFM regions. The check simply masks the most significant address bit (BASE, SIZE, ADDR) used in the compare.
Individual mirror bits per PWPn regions allows the lower PFM to be protected while the upper region is not (or vice versa).
This becomes important for TrustZone applications in which both the lower and upper TrustZone regions must remain protected and locked while only the lower untrusted regions are protected.
PWP Example
For example, to protect a 104KB region starting at 0x0134_7000:
BASE = 0x0134_7000 << 8 = 0x3470_0000
SIZE = 104/4 = 26 = 0x1A = 0x0000_001A
PWPEN = 0x0000_8000
PWPn = BASE | PWPEN | SIZE
The result for PWPn is 0x3470_801A
The following figure shows a graphical representation of Program Write Protect (PWP). Shaded regions are write/erase protected. Non-shaded regions are not protected.
- Values for PWPMIR: Mirror PWP bit
- 1 (MIRROR) = PWP settings are Mirrored.
- 0 (UNMIRROR) = PWP settings are NOT Mirrored, also applies to single panel systems.
PWPx Lock/Unlock Sequence
PWPx registers require a lock/unlock sequence as described in SFR Write Unlock Values. Any attempt to write to the PWPx register when locked has no effect.
Local Lock Bits
The user may optionally select to prevent further writes to a PWPn register by also setting the local LOCK bit (in the same register) when writing the PWPn values.
When the local lock bit is set (LOCK = 1), subsequent writes to that register (even if the register unlock sequence is followed) have no effect, creating a “write once’ register. Local LOCK bits revert to the unlocked state at reset.