36.1 Endpoint Bank, Adress of Data Buffer

Table 36-24. Register Bit Attribute Legend
Symbol	Description	Symbol	Description	Symbol	Description
R	Readable bit	HC	Cleared by Hardware	(Grey cell)	Unimplemented
W	Writable bit	HS	Set by Hardware	X	Bit is unknown at Reset
K	Write to clear	S	Software settable bit	—	—

Name:	ADDR - DEVICE_DESC_BANK Mode
Offset:	0x000
Property:	RW


Bit	31	30	29	28	27	26	25	24
	ADDR[31:24]
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset


Bit	23	22	21	20	19	18	17	16
	ADDR[23:16]
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset


Bit	15	14	13	12	11	10	9	8
	ADDR[15:8]
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset


Bit	7	6	5	4	3	2	1	0
	ADDR[7:0]
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset

Bits 31:0 – ADDR[31:0] Adress of data buffer

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