This register allows the user to toggle the direction of one or more I/O
pins, without doing a read-modify-write operation. Changes in this register will
also be reflected in the Data Direction (DIR), Data Direction Set (DIRSET), and Data
Direction Clear (DIRCLR) registers.
Table 33-6. Register Bit Attribute
Legend
Symbol
Description
Symbol
Description
Symbol
Description
R
Readable bit
HC
Cleared by Hardware
(Grey cell)
Unimplemented
W
Writable bit
HS
Set by Hardware
X
Bit is unknown at Reset
K
Write to clear
S
Software settable bit
—
—
Name:
DIR
Offset:
0x00
Reset:
0x00000000
Property:
RW
Bit
31
30
29
28
27
26
25
24
DIR[31:24]
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
DIR[23:16]
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
DIR[15:8]
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
DIR[7:0]
Access
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
Bits 31:0 – DIR[31:0] Port Data Direction
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