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15.6.8 Error Capture Address Register
Table 15-9. Register Bit Attribute
Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: MCRAMC_ERRCADR Offset: 0x20 Reset: 0x00000000 Property: R
Bit 31 30 29 28 27 26 25 24 Access Reset
Bit 23 22 21 20 19 18 17 16 ERCADR[23:16] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 ERCADR[15:8] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 ERCADR[7:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bits 23:0 – ERCADR[23:0] ECC SECDED Error Capture Address
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