19.6.10 Debug Communication Channels

The Debug Communication Channels (DCC0 and DCC1) consist of a pair of registers with associated handshake logic, accessible by both CPU and debugger with no security restriction. These registers are used to exchange data between the device and a debugger. This enables the user to build a custom debug protocol using only these registers.

The DCC0 and DCC1 registers are always accessible from the external address space. They are used to communicate with the Boot ROM after a cold-plugging procedure.

Two Debug Communication Channel status bits in the STATUSB register (STATUSB.DCCDx) indicate that a new value has been written into DCC0 or DCC1. The DCC0D and DCC1D bits are located in the STATUSB register. They are automatically set by hardware and cleared on read.

Note: The DCC0 and DCC1 registers are shared with the Boot Communication Channels (BCC0 and BCC1) registers, therefore mixing DCC and BCC communication is not recommended.

Each DCC register also has a DMA request associated with it which can either be configured to assert when the DCCn register is full or empty. The DMA can be configured to either read from or write to the DCCn channel on a DMA request, thus allowing the DMA to transfer data into and out of the debugger through the DCCn registers.