4.17 Dynamic Channel Quality - Signal Quality Indicator (DCQ SQI) - Rev D0

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This section applies to devices of revision D0 and later.

The Dynamic Channel Quality (DCQ) Signal Quality Indication (SQI) feature has been implemented according to version 2.1 of the OPEN Alliance Advanced Diagnostic Features for 10BASE‑T1S Automotive Ethernet PHYs Specification. The major advantage of this SQI method over the method used in earlier product revisions is that it returns a channel quality measurement much quicker and over a wider range.

Note: This DCQ SQI cannot be used at the same time as the non‑DCQ SQI implemented previously. The SQI Enable (SQIEN) bit in the SQI Control (SQICTL) register must be ‘0’ disabling the earlier non‑SQI implementation.

The DCQ SQI is determined by accumulating jitter statistics on received data. Two ranges of SQI are generated. The three-bit DCQ SQI returns an eight‑level value ranging from ‘000’, worst value, and ‘111’, best value, in the SQI field of the DCQ_SQI register. An enhanced range five-bit SQI Plus (SQI+) returns a 32‑level value ranging from ‘00000’, worst value, and ‘11111’, best value, in the SQI Plus (SQIP) field of the DCQ_SQIP register. Both the 8-level SQI and 32-level SQI+ measurements are performed simultaneously and complete at the same time. The three bits of the 8-level SQI are identical to the most significant three bits of the 32-level SQI+; The 32-level SQI+ simply provides extra granularity.

When PLCA is used, a single node is selected by using the Transmit Opportunity ID (TOID) field of the DCQ Transmit Opportunity ID (DCQ_TOID) register. The DCQ SQI and SQI+ measurements are computed only from the data received during the specified transmit opportunity.

When PLCA is not enabled, the TOID field must be set to ‘0xFF’ so the DCQ SQI and SQI+ will be computed from all data received regardless of PLCA Transmit Opportunity. In this case, the resulting SQI and SQI+ measurement is a weighted average of data transmitted from all other nodes on the mixing segment; the more packets a node transmits, the higher this node will be weighted.

The DCQ SQI and SQI+ measurements begin automatically upon writing a new value into the TOID field of the DCQ_TOID register. Upon completion the measurement, a ‘1’ is written by hardware into the SQI Update (SQI_UPD) and SQI+ Update (SQIP_UPD) bits of the DCQ_SQI and DCQ_SQIP registers, respectively. The setting of the SQI_UPD bit indicates that the value in the corresponding three-bit SQI field is valid. Likewise, SQIP_UPD being set indicates that the value in the corresponding five-bit SQIP field is valid.

The SQI_UPD and SQIP_UPD bits are automatically cleared on read. Reading of SQI_UPD also results in a new measurement being triggered in addition to the clearing of the SQI_UPD status bit. Reading of the SQIP_UPD bit will not trigger a new measurement, although it will result in SQIP_UPD being cleared.

Tip: First read the 32-level DCQ SQI Plus register (DCQ_SQIP) to return the current SQIP_UPD status and SQIP value. If the SQIP_UPD status is set, then the returned 32-level SQIP value is valid. The SQIP_UPD status was cleared. Then, to restart a new measurement, read the eight-level DCQ SQI register (DCQ_SQI) to clear the SQI_UPD status bit and trigger new measurement for the eight-level SQI and 32-level SQI+.

When the DCQ SQI Update and DCQ SQI_ Update bits are set then the SQI bit in the Status 1 (STS1) register is set. The SQI Mask (SQIM) bit in the Interrupt Mask 1 (IMSK1) register may be written to ‘0’ to enable an assertion of the interrupt on IRQ_N pin to the station host controller when the SQI status bit is set.

A new SQI measurement is also triggered upon writing a new value to the DCQ_TOID register. If the value of the TOID field is changed while a measurement is ongoing then the current measurement will be aborted and a new one started.

Programming Model - Polling

In polling mode, the host controller polls the SQIP_UPD bit in the DCQ_SQIP register to identify when new DCQ SQI and SQI+ measurement results are available.
  1. Configure the PLCA transmit opportunity of the node of interest into the Transmit Opportunity ID (TOID) bit field of the DCQ_TOID register. If not using PLCA, the value 0xFF should be used so that the SQI is computed from received packets from all nodes.
  2. Periodically poll the DCQ_SQIP register. The DCQ_SQIP and DCQ_SQI status bits will be set simultaneously. When the SQIP_UPD bit is set in the DCQ_SQIP register, the SQIP field returns the measured 32‑level SQI+ result.
    Tip: The time required for the SQI statistical accumulation process to complete depends on the amount of data received from the node of interest and may therefore vary significantly. A polling rate of approximately once per second is recommended.
  3. Read the DCQ_SQI register. The SQI_UPD bit should be set. When the SQI_UPD bit is set in the DCQ_SQI register, the SQI field contains the measured eight‑level SQI result and may be used, if desired. Reading of the DCQ_SQI register clears the SQI_UPD bit and initiates a new measurement.
  4. Continue polling in step 2, above.
  5. A new measurement is also initiated by writing a new value to the DCQ_TOID register.

Programming Model - Interrupt

In interrupt mode, the host controller configures and initiates a DCQ SQI/SQI+ measurement then waits for an assertion of the interrupt on IRQ_N pin to the station host controller when the measurement is complete and results are available.
  1. Write a ‘0’ to the SQI Mask (SQIM) bit of the Interrupt Mask 1 registers. This will enable the assertion of the interrupt on IRQ_N pin to the station host controller when the measurement is complete
  2. Configure the PLCA transmit opportunity of the node of interest into the Transmit Opportunity ID (TOID) bit field of the DCQ_TOID register. If not using PLCA, the value 0xFF should be used so that the DCQ SQI/SQI+ is computed from received packets from all nodes.
  3. Wait for an assertion of the interrupt on IRQ_N pin.
  4. Read the Status 1 (STS1) register. If the SQI bit is clear, process the other pending interrupts and continue waiting in step 3 above.
    Tip: The time required for the SQI statistical accumulation process to complete depends on the amount of data received from the node of interest and may therefore vary significantly. A polling rate of approximately once per second is recommended.
  5. When the SQI bit of the Status 1 (STS1) register is set, read the DCQ_SQIP register. The DCQ_SQIP and DCQ_SQI status bits will be set simultaneously. When the SQIP_UPD bit is set in the DCQ_SQIP register, the SQIP field returns the measured 32‑level SQI+ result.
  6. Read the DCQ_SQI register. The SQI_UPD bit should be set. When the SQI_UPD bit is set in the DCQ_SQI register, the SQI field contains the measured eight‑level SQI result and may be used, if desired. Reading of the DCQ_SQI register clears the SQI_UPD bit and initiates a new measurement.
  7. Continue waiting for the new SQI/SQI+ measurement to complete by waiting for an interrupt in step 3, above.
  8. A new measurement is also initiated by writing a new value to the DCQ_TOID register.