5.4.7 Status 1 Register - Rev D

This register is only valid for devices of Revision D0 and later.
Name: STS1 - Rev D
Address: 0x0018

Bit 15141312111098 
 SLPFAILTDDLNKSTSCSQIPSTCTXCOLTXJABTSSI 
Access RCRCRCRCRCRCRCRC 
Reset 00000000 
Bit 76543210 
 EMPCYCHDDDPLCADIAGUNCRSPLCASYMESDERRDEC5B 
Access RCRORCRCRCRCRCRC 
Reset 00000000 

Bit 15 – SLPFAIL Sleep Fail Status

This bit is set to indicate a failure to enter low-power sleep state.
ValueDescription
0 Sleep mode has not failed.
1 Sleep mode failure detected.

Bit 14 – TDD Topology Discovery Done Status

This bit is set to indicate that Topology Discovery process has finished.
ValueDescription
0 Topology Discovery has not completed.
1 Topology Discovery has completed.

Bit 13 – LNKSTSC Link Status Change

This bit is set to indicate that the Links Status has changed.
ValueDescription
0 Link status has not changed.
1 Link status has changed.

Bit 12 – SQI Signal Quality Indication Status

This bit is set to indicate an SQI status change.
ValueDescription
0 SQI status has not changed.
1 SQI status has changed.

Bit 11 – PSTC PLCA Status Changed

This bit is set to indicate that the PLCA Status (PST) bit has changed within the PLCA Status (PLCA_STS) register.
ValueDescription
0 PLCA Status has not changed.
1 PLCA Status has changed.

Bit 10 – TXCOL Transmit Collision Status

Physical collision on the network was detected. This does not include logical collisions due to normal operation of PLCA.
ValueDescription
0 No collision detected during transmit
1 Collision detected during transmit

Bit 9 – TXJAB Transmit Jabber Status

This bit indicates the occurrence of a transmit jabber condition. A jabber condition occurs when the PHY detects that the PCS has remained in the transmit state longer than 2 ms. When a jabber condition is detected, the transmitter is disabled for the duration of 16 ms.
ValueDescription
0 No transmit jabber detected
1 Transmit jabber detected

Bit 8 – TSSI Time Synchronization Service Interface Status

This bit is set when the TSSI has indicated the transmission or reception of an Ethernet packet.
ValueDescription
0 No transmitted or received frames indicated
1 A transmitted or received frame has been indicated

Bit 7 – EMPCYC PLCA Empty Cycle Status

This bit indicates the detection of an empty PLCA bus cycle. An empty bus cycle occurs when the node detects no transmissions in any of the possible transmit opportunities between two successive BEACONs.
ValueDescription
0 An empty PLCA cycle has not been detected
1 An empty PLCA cycle has been detected

Bit 5 – HDDD Harness Defect Detection Done

This bit indicates that the harness defect detection process has finished.
ValueDescription
0 Harness Defect Detection has not finished.
1 Harness Defect Detection is done.

Bit 4 – PLCADIAG PLCA Diagnostics Interrupt

This bit is triggered upon a PLCA diagnostic change.
ValueDescription
0 No PLCA diagnostic interrupt is present.
1 PLCA diagnostic interrupt has occurred.

Bit 3 – UNCRS Unexpected Carrier Sense

When operating in ACMA mode, this bit will indicate carrier sense during this PHY’s transmit slot when ACMA is asserted.
ValueDescription
0 No Carrier has been sensed during PHY’s ACMA time slot
1 Carrier has been sensed during PHY’s ACMA time slot

Bit 2 – PLCASYM PLCA Symbols Detected

This bit indicates the detection of PLCA BEACON symbols when PLCA is not enabled. This condition may indicate the local node is operating with PLCA disabled on a segment with PLCA enabled nodes.
ValueDescription
0 PLCA BEACON symbols have not been detected from the network with PLCA disabled
1 PLCA BEACON symbols have been detected from the network with PLCA with disabled

Bit 1 – ESDERR End-of-Stream Delimiter Error

This bit indicates the reception of an End-of-Stream Delimiter Error (ESDERR) or End-of-Stream Jabber (ESDJAB) symbol.
ValueDescription
0 ESD error has not been detected
1 ESD error has been detected

Bit 0 – DEC5B 5B Decode Error

This bit indicates the 5B decoder encountered an unknown or reserved 5B codeword that could not be decoded.

ValueDescription
0 5B decoder error has not occurred
1 5B decode error has occurred