LAN8670/1

7.6.11 Wake-up Signal Characteristics and Timing - Rev D0

Note: This section describes the timing and behavior for LAN8670/1 revision D0.

The following diagram illustrates the timing characteristics as the device wakes from sleep.

Figure 7-15. Wake Signal Timing (Rev D0)

Table 7-23. 10BASE-T1S PMA Receiver Wake Signal Characteristics
Description	Symbol	Min	Typ	Max	Units	Additional Information
MDI wake-up tone (WUT) response time	t_{det_wut}	30		45	μs	Note 1
MDI wake-up tone (WUT) signal threshold	V_{thresh_wut}	100		750	mV_pp	Note 2
Note: Measured from the start of 625 kHz tone to INH assertion. The device will not wake if the WUT signal amplitude is less than or equal to the minimum V_{thresh_wut}. It will wake if the signal amplitude is greater than or equal to the maximum value V_{thresh_wut}. The behavior is undefined for amplitudes between these limits.

Table 7-24. WAKE_IN / WAKE_IO Input Signal Characteristics
Description	Symbol	Min	Typ	Max	Units	Additional Information
WAKE_IN / WAKE_IO response time	t_{det_wi}		39	45	μs	Note 1
WAKE_IN / WAKE_IO detection time	t_{det_wi_vld}	15	23	40	μs	Notes 2, 3
Note: Measured from WAKE_IN active edge to INH assertion. The device will not wake if the signal duration is less than or equal to the minimum value of t_{det_wi_vld}. It will wake if the signal duration is greater than or equal to the maximum value of t_{det_wi_vld}. The behavior is undefined for signal duration between these limits. The WAKE_IN pin is a standard VI-VDDAU type input buffer. See the section DC Electrical Characteristics (other than 10BASE-T1S PMA) for details.

Table 7-25. Wake Signal Time
Description	Symbol	Min	Typ	Max	Units	Additional Information
IRQ_N assertion time after all power supplies valid	t_{po_irq}		900		μs
MDI wake-up tone (WUT) forward signaling activity start after all power supplies valid	t_{po_wut}		900		μs	Note 1
WAKE_OUT / WAKE_IO wake forward assertion time after all power supplies valid	t_{po_wo}		900		µs
WAKE_OUT / WAKE_IO pulse width	t_wo		90		μs
Power supply response time	t_{ps_resp}	Application Specific				Notes 2, 3
Note: The WUT forwarding latency will depend on PLCA or other network traffic. The power supply response time is the length of time from the power supplies being enabled by INH being driven high to the time the VDDP and VDDA supplies are high enough to release the internal power-on reset circuits. This time is dependent upon the implementation of the external power supply circuits and therefore is implementation specific. The VDDP and VDDA supplies are not required to be disabled after entering sleep mode prior to a wake event. However, if the supplies are disabled then the device must be re-configured upon wake.

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.