35.7.5.13 Debug Control

Table 35-40. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: DBGCTRL
Offset: 0x30
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
        DBGSTOP 
Access R/W 
Reset 0 

Bit 0 – DBGSTOP Debug Stop Mode

This bit controls the functionality when the CPU is halted by an external debugger.

ValueDescription
0The baud-rate generator continues normal operation when the CPU is halted by an external debugger.
1The baud-rate generator is halted when the CPU is halted by an external debugger.