35.7.5.4 Baud Rate
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | BAUD |
Offset: | 0x0C |
Reset: | 0x00 |
Property: | PAC Write-Protection, Enable-Protected |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
BAUD[7:0] | |||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:0 – BAUD[7:0] Baud Register
These bits control the clock generation, as described in the Clock Generation – Baud-Rate Generator.