25.7.4.1 Linked List Block Descriptor

Each block transfer descriptor in a linked list is a contiguous region of Memory and consists of ten 32-bit words ordered as follows (see Block Transfer Descriptor):

  • A word, BDNXT, that always gets loaded into the CHNXTk.NXT register in order to access the next descriptor.
  • A control word, BDCFG, whose bits[9:0] always get loaded into the CHLLCFGSTATk[9:0] register. These bits are the flags that control loading of the subsequent memory locations of the descriptor into the DMA Channel control registers.
    • The RUNSTDBY bit is loaded into the CHCTRLAk.RUNSTDBY bit.
    • The bits LLEN, ENABLE, and SWFRC in the control word BDCFG set the CHCTRLAk.LLEN, CHCTRLAk.ENABLE, and CHCTRLAk.SWFRC bits. These are always loaded into the CHCTRLAk register at the end of the descriptor load.
  • A word, BDCTRLB, that gets loaded into the CHCTRLBk register if BDCFG.CTRLB is set
  • A half-word, BDEVCTRL, that gets loaded into the CHEVCTRLk register if BDCFG.EVCTRL is set and the channel supports events (i.e k < 24). If the channel does not support events, the bit BDCFG.EVCTRL is ignored and BDEVCTRL is never loaded.
  • A half-word BDCTRLCRC, that gets loaded into the CHCTRLCRCk register if BDCFG.CTRLCRC is set.
  • A word, BDSSA, that gets loaded into the CHSSAk register if BDCFG.SSA is set.
  • A word, BDDSA, that gets loaded into the CHDSAk if BDCFG.DSA is set.
  • A half-word BDSSTRD, that gets loaded into the CHSSTRDk register if BDCFG.SSTRD is set.
  • A half-word BDDSTRD, that gets loaded into the CHDSTRDk register if BDCFG.DSTRD is set.
  • A word BDXSIZ, that gets loaded into the CHXSIZk register if BDCFG.XSIZ is set.
  • A word BDPDAT, that gets loaded into the CHPDATk register if BDCFG.PDAT is set.
  • A word BDCRCDAT, that gets loaded into the CHCRCDATk register if BDCFG.CRCDAT is set.

Upon loading the CHLLCFGSTATk register from the BDCFG word of a descriptor, the DMA_TOP_FSM may overwrite the contents of the DMA Channel SFRs as instructed by the set bits in CHLLCFGSTATk.

Only the first two words of the descriptor are mandatory. All other words are optional. However, the address offset for each of the descriptor words are fixed. Therefore if BDCFG.XSIZ is set, the descriptor must contain at least eight words to honor the address offset for BDXSIZ. However, the remaining two words are never used by the DMA. The user can decide not to reserve them for the descriptor.

A descriptor, regardless of the size, must reside within a 1KB address boundary. The DMA may perform speculative reads on the descriptor content; therefore the first word of the descriptor must reside a minimum of ten words below a memory boundary to avoid speculative reads into unmapped memory regions.