47.6.5 SPI Control Audio Register
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | AUDCTRL |
Offset: | 0x10 |
Reset: | 0x00 |
Property: | PAC Write-Protection |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
AUDWDMODE[1:0] | |||||||||
Access | R/W | R/W | |||||||
Reset | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
AUDFMT[2:0] | AUDMONO | AUDMOD[1:0] | |||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 9:8 – AUDWDMODE[1:0] Serial Word Length bits (Ignored when AUDEN=0)
For AUDEN = 1: & AUDFMT= 3’b000 | ||
COMMUNICATION | ||
1 | 1 | 24-bit Data, 32-bit Channel/1/32-bit Frame pulse |
1 | 0 | 32-bit Data, 32-bit Channel/1/32-bit Frame pulse |
0 | 1 | 16-bit Data, 32-bit Channel/1/16/32-bit Frame pulse |
0 | 0 | 16-bit Data, 16-bit Channel/1/16-bit Frame pulse |
For AUDEN = 1: & AUDFMT= 3’b001 | ||
COMMUNICATION | ||
1 | 1 | Reserved |
1 | 0 | I2S -24-bit raw audio data (slot), 32-Bit Ch/1/32-bit Frame pulse |
0 | 1 | I2S -20-bit raw audio data (slot), 32-Bit Ch/1/32-bit Frame pulse |
0 | 0 | I2S -16-bit raw audio data (slot), 32-Bit Ch/1/32-bit Frame pulse |
For AUDEN = 1: & AUDFMT= 3’b010 | ||
COMMUNICATION | ||
1 | 1 | I2S -16-bit x2 audio packed left down, 32-Bit Ch/Ch/1/32-bit Frame pulse |
1 | 0 | I2S -16-bit x2 audio packed left up, 32-Bit Ch/Ch/1/32-bit Frame pulse |
0 | 1 | Reserved |
0 | 0 | I2S -24-bit audio packed, 32-Bit Ch/Ch/1/32-bit Frame pulse |
For AUDEN = 1: & AUDFMT= 3’b101 | ||
COMMUNICATION | ||
1 | 1 | Reserved |
1 | 0 | I8S -24-bit raw audio data, 32-Bit Ch, 1/32/128-bit Frame pulse |
0 | 1 | I8S -20-bit raw audio data, 32-Bit Ch, 1/32/128-bit Frame pulse |
0 | 0 | I8S -16-bit raw audio data, 32-Bit Ch, 1/32/128-bit Frame pulse |
For AUDEN = 1: & AUDFMT= 3’b110 | ||
COMMUNICATION | ||
1 | 1 | I8S -16-bit x2 audio packed left down, 32-Bit Ch, 1/32/128-bit Frame pulse |
1 | 0 | I8S -16-bit x2 audio packed left up, 32-Bit Ch, 1/32/128-bit Frame pulse |
0 | 1 | I8S -32-bit data, 32-Bit Ch/128-bit Frame pulse |
0 | 0 | I8S -24-bit audio packed, 32-Bit Ch, 1/32/128-bit Frame pulse |
For AUDEN = 1: & AUDFMT= 3’b100 | ||
COMMUNICATION | ||
1 | 1 | Reserved |
1 | 0 | I8S -24-bit MSB al, mute lower bits, 32-Bit Ch, 1/32/128-bit Frame pulse |
0 | 1 | I8S -20-bit MSB al, mute lower bits, 32-Bit Ch, 1/32/128-bit Frame pulse |
0 | 0 | I8S -16-bit MSB al, mute lower bits, 32-Bit Ch,1/32/128-bit Frame pulse |
Note:
- Channel is not meaningful for DSP/PCM mode as LRC follows FRMSYPW
- Can only be written when ON bit =’0’, and is only valid for AUDEN = 1
Bits 6:4 – AUDFMT[2:0] Audio Protocol Format
Note:
- Generate a frame sync pulse on every 8 Serial Words.(Value used by Audio I8S Protocols.)
- Generate a frame sync pulse on every 2 Serial Words. (Value used by Audio I2S Protocols.)
- Can only be written when ON bit =’0’, and is only valid for AUDEN = 1.
Value | Description |
---|---|
111 | Reserved |
110 | I8S Other AM824 formats Mode see note 2 |
101 | I8S AM824 Raw audio format Mode see note 2 |
100 | I8S Other formats see note 2 |
011 | Reserved |
010 | I2S Other AM824 formats Mode see note 1 |
001 | I2S AM824 Raw audio format Mode see note 1 |
000 | Legacy I2S modes see note 1 |
Bit 3 – AUDMONO Transmit audio data format
Note: Can only be written when ON bit
=’0’, and is only valid for AUDEN = 1.
Value | Description |
---|---|
0 | Audio Data is Stereo |
1 | Audio Data is Mono (Each data word is transmitted on both left and right channels) |
Bits 1:0 – AUDMOD[1:0] Audio Protocol Mode
Note:
- Can only be written when ON bit =’0’, and is only valid for AUDEN = 1.
- In I2S Mode, this peripheral functions as if FRMCOINC=0, regardless of its actual value.
- In Right or Left Justified Mode (DATFMT_LR), this peripheral functions as if FRMCOINC=1, regardless of its actual value.
- When not in PCM/DSP Mode, this peripheral functions as if FRMSYPW=0001, regardless of it actual value.
- AUDFMT is used to select between I2S, I8S, PCM audio modes.
Value | Description |
---|---|
11 | PCM/DSP Mode |
10 | Reserved |
01 | I2S, I8S right/left Justified Mode -see DATFMT_LR |
00 | I2S, I8S Standard Mode |