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PolarFire® SmartSFP+ Solution Featuring In-Application Programming AN4568
PolarFire® SmartSFP+ Solution Featuring In-Application Programming AN4568
  1. Home
  2. 1 Design Description
  3. 1.2 IAP Target
  4. 1.2.3 Electrical Interface

AN4568

  • Introduction
  • 1 Design Description
    • 1.1 IAP Initiator
    • 1.2 IAP Target
      • 1.2.1 Target Subsystem
      • 1.2.2 Mi-V Subsystem (Target Version)
      • 1.2.3 Electrical Interface
        • 1.2.3.1 PF_XCVR_ERM_C2 (IAP Target)
        • 1.2.3.2 CORE10GMAC_C0 (IAP Target)
      • 1.2.4 Memory Map (IAP Target)
    • 1.3 Clocking Structure
    • 1.4 Reset Structure
  • 2 SPI Programming Images
  • 3 Demo Requirements
  • 4 Demo Prerequisites
  • 5 Setting Up the Demo
  • 6 Running the Demo
  • 7 Revision History
  • Microchip FPGA Support
  • Microchip Information

1.2.3 Electrical Interface

The electrical interface consists of the followings components:
  • PF_XCVR_ERM_C2 (IAP Target)
  • CORE10GMAC_C0 (IAP Target)

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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