1.2 PolarFire® SoC MSS Configurator v2024.1 Welcome Page

The PolarFire® SoC Microprocessor Subsystem (MSS) Configurator is a software tool to configure the PolarFire SoC microprocessor subsystem. The MSS configuration is imported by the Libero® SoC Design Suite in the FPGA design flow and SoftConsole in the embedded design flow.

What's New in PolarFire SoC Standalone MSS Configurator v2024.1

  • Enabled DDR3, LPDDR3 x16 DQ width
  • DDR3, DDR4 ECC ports updated for x16 and x32 DQ
  • ZQ AUTO CAL configuration option

Getting Started

  • To start configuring a new MSS subsystem, select New from the project menu.
  • To open an existing configuration file (.cfg), select Open from the project menu.
  • To save the current configuration of the MSS subsystem, select Save or Save As from the project menu.
  • To generate the MSS component file (.cxz), select Generate from the project menu after configuring the MSS subsystem. The MSS component file can be imported into Libero SoC tool. MSS configuration (.cfg) file will also be generated along with XML file.
  • To close the current configuration file (.cfg) select Close from the project menu.
    Important: The current configuration file needs to be closed before starting a new configuration.

Working Modes

  • Batch Mode: PolarFire SoC MSS Configurator tool can be executed in batch mode. For example:
    pfsoc_mss -GENERATE -CONFIGURATION_FILE:<absolute or relative path for configuration file name (.cfg)> -OUTPUT_DIR:<absolute or relative path for output directory> -EXPORT_HDL:<true/false> -LOGFILE:<absolute or relative path for logfile file name>
    Important: The argument -GENERATE must be specified to generate the MSS component and the XML file in batch mode. -EXPORT_HDL and -LOGFILE are optional arguments.
  • GUI Mode: PolarFire SoC MSS Configurator tool can be opened in the graphical user interface (GUI) mode for a particular configuration file. For example:
    pfsoc_mss -CONFIGURATION_FILE:<absolute or relative path for configuration file name (.cfg)>

More Information

Libero SoC Design Suite Help Documentation

  • For Release Notes, Known issues, and Limitations, see Libero SoC Design Suite Release Notes.
  • For the new Libero SoC Design Suite Help documentation, which provides robust search and navigation as well as HTML-based content, see Libero SoC Design Suite Help Documentation.
  • Click here to download the latest Libero SoC Design Suite Help documentation (in HTML file format) for offline reference. Extract the contents of the .zip archive and open the index.html file in a web browser of your choice.

FPGA Design Resources

Click the following links to explore our other FPGA design resources:

Licensing

Libero software and DirectC license orders are now supported through Microchip purchasing portal. Most of the software tools and FPGA IP cores are freely available but some high-value IP cores and resources needed to work with high-density FPGAs require paid licenses. For more information, see Licensing.