3.5.3.2 Memory Architecture

SmartHLS stores any arrays (local or global) and global variables in a memory. We describe below what type of memories they are, as well as where the memories are stored.

In SmartHLS, there exists four hierarchies of memories: 1) Local memory, 2) shared-local memory, 3) aliased memory, and 4) I/O memory. Local, shared-local, and aliased memories exist in the generated hardware. I/O memories are data that are inputs/output to/from the generated hardware. They exist outside of the generated hardware (SmartHLS does not instantiate memories for them), where top-level memory interfaces are created for them.

SmartHLS automatically determines the read latency for memories based on the target clock period and timing model. User can disable this function by changing 3.6.2.4.3 ENABLE_AUTOMATIC_MEMORY_LATENCY_SETTING Tcl parameter. Alternatively, users can override the default values using 3.6.2.2.6 set_operation_latency Tcl parameter . The auto-determined latency can be found in Memory Usage section of SmartHLS report.