8.10.2.8 UPDI Protection
The default value given in this fuse description is the factory-programmed value and may not be mistaken for the Reset value.
| Name: | PDICFG |
| Offset: | 0x0A |
| Reset: | 0x03 |
| Property: | - |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| KEY[11:4] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| KEY[3:0] | LEVEL[1:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 1 | 1 | |||
Bits 15:4 – KEY[11:0] UPDI Protection Activate Key
This bit field contains the 12-bit enable key for UPDI protection. The protection does not take effect unless the device is code protected (LOCK.KEY is set to LOCKED state).
| Value | Name | Description |
|---|---|---|
0xB45 | LOCK | Protection enabled |
Other | UNLOCK | Protection disabled |
Bits 1:0 – LEVEL[1:0] UPDI Protection Level
This bit field is used to set the level of UPDI protection.
| Value | Name | Description |
|---|---|---|
2'b00 - 2'b01 | Reserved | |
2'b10 | NVMACCDIS | NVM access through UPDI disabled. Chip Erase and USERROW write are also disabled. |
2'b11 | UNPROT | UPDI interface and UPDI pins working as normal |