25.7.9 Peripheral Interrupt Flag Status - Bridge D
These flags are set when a Peripheral Access Error occurs while accessing the peripheral, and an
interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to these bits has no effect.
Writing a ‘1’ to these bits clears the corresponding INTFLAGx interrupt flag.
| Name: | INTFLAGD |
| Offset: | 0x20 |
| Reset: | 0x00000000 |
| Property: | – |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CAN1 | CAN0 | ||||||||
| Access | RW | RW | |||||||
| Reset | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TC9 | TC8 | SERCOM5 | SERCOM4 | SERCOM3 | SERCOM2 | ||||
| Access | RW | RW | RW | RW | RW | RW | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 9 – CAN1 Interrupt Flag for CAN1
This flag is set when a Peripheral Access Error occurs while accessing the peripheral, and an
interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the interrupt flag.
Bit 8 – CAN0 Interrupt Flag for CAN0
This flag is set when a Peripheral Access Error occurs while accessing the peripheral,
and an interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the interrupt flag.
Bit 5 – TC9 Interrupt Flag for TC9
This flag is set when a Peripheral Access Error occurs while accessing the peripheral,
and an interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the interrupt flag.
Bit 4 – TC8 Interrupt Flag for TC8
This flag is set when a Peripheral Access Error occurs while accessing the peripheral,
and an interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the interrupt flag.
Bit 3 – SERCOM5 Interrupt Flag for SERCOM5
This flag is set when a Peripheral Access Error occurs while accessing the peripheral,
and an interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the interrupt flag.
Bit 2 – SERCOM4 Interrupt Flag for SERCOM4
This flag is set when a Peripheral Access Error occurs while accessing the peripheral, and an
interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the interrupt flag.
Bit 1 – SERCOM3 Interrupt Flag for SERCOM3
This flag is set when a Peripheral Access Error occurs while accessing the peripheral,
and an interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the interrupt flag.
Bit 0 – SERCOM2 Interrupt Flag for SERCOM2
This flag is set when a Peripheral Access Error occurs while accessing the peripheral,
and an interrupt request is generated if SET.ERR is ‘1’.
Writing a ‘0’ to this bit has no effect.
Writing a ‘1’ to this bit clears the interrupt flag.