2.1.1 Operating Conditions

Stresses beyond the operating conditions listed in Table 2-1 may cause permanent damage to the device.

Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings are stress ratings only; functional operation of the device at these or any other conditions beyond those listed under the Recommended Operating Conditions specified in Table 2-3 is not implied.

Table 2-1. Absolute Maximum Ratings
Symbol	Parameter	Limits	Units
VCC	DC core supply voltage	–0.3 to 1.65	V
VJTAG	JTAG DC voltage	–0.3 to 3.75	V
VPP	Programming voltage	–0.3 to 3.75	V
VCCPLLx	Analog power supply (PLL)	–0.3 to 1.65	V
VCCFPGAIOBx	DC FPGA I/O buffer supply voltage	–0.3 to 3.75	V
VCCMSSIOBx	DC MSS I/O buffer supply voltage	–0.3 to 3.75	V
VI	I/O input voltage	–0.3V to 3.6V (when I/O hot insertion mode is enabled) –0.3V to (VCCxxxxIOBx + 1V) or 3.6V, whichever voltage is lower (when I/O hot-insertion mode is disabled)	V
VCC33A	Analog clean 3.3V supply to the analog circuitry	–0.3 to 3.75	V
VCC33ADCx	Analog 3.3V supply to ADC	–0.3 to 3.75	V
VCC33AP	Analog clean 3.3V supply to the charge pump	–0.3 to 3.75	V
VCC33SDDx	Analog 3.3V supply to the sigma-delta DAC	–0.3 to 3.75	V
VAREFx	Voltage reference for ADC	1.0 to 3.75	V
VCCRCOSC	Analog supply to the integrated RC oscillator	–0.3 to 3.75	V
VDDBAT	External battery supply	–0.3 to 3.75	V
VCCMAINXTAL	Analog supply to the main crystal oscillator	–0.3 to 3.75	V
VCCLPXTAL	Analog supply to the low power 32 kHz crystal oscillator	–0.3 to 3.75	V
VCCENVM	Embedded nonvolatile memory supply	–0.3 to 1.65	V
VCCESRAM	Embedded SRAM supply	–0.3 to 1.65	V
VCC15A	Analog 1.5V supply to the analog circuitry	–0.3 to 1.65	V
VCC15ADCx	Analog 1.5V supply to the ADC	–0.3 to 1.65	V
T_STG¹	Storage temperature	–65 to +150	°C
T_J¹	Junction temperature	125	°C

Note:

For flash programming and retention maximum limits, refer to Table 2-4. For recommended operating conditions, refer to Table 2-3.
The device should be operated within the limits specified by the datasheet. During transitions, the input signal may undershoot or overshoot according to the limits shown in Table 2-5.

Table 2-2. Analog Maximum Ratings
Parameter	Conditions	Min.	Max.	Units
ABPS[n] pad voltage (relative to ground)	GDEC[1:0] = 00 (±15.36V range)
	Absolute maximum	–11.5	12.4	V
	Recommended	–11	12	V
	GDEC[1:0] = 01 (±10.24V range)	–11.5	12	V
	GDEC[1:0] = 10 (±5.12V range)	–6	6	V
	GDEC[1:0] = 11 (±2.56V range)	–3	3	V
CM[n] pad voltage relative to ground)	CMB_DI_ON = 0 (ADC isolated) COMP_EN = 0 (comparator off, for the associated even-numbered comparator)
	Absolute maximum	–0.3	12.4	V
	Recommended	–0.3	12	V
	CMB_DI_ON = 0 (ADC isolated) COMP_EN = 1 (comparator on)	–0.3	3	V
	TMB_DI_ON = 1 (direct ADC in)	–0.3	3	V
TM[n] pad voltage (relative to ground)	TMB_DI_ON = 0 (ADC isolated) COMP_EN = 1(comparator on)	–0.3	3	V
TM[n] pad voltage (relative to ground)	TMB_DI_ON = 1 (direct ADC in)	–0.3	3	V
ADC[n] pad voltage (relative to ground)	—	–0.3	3.6	V

Table 2-3. Recommended Operating Conditions
Symbol	Parameter¹		Military	Units
T_J	Junction temperature		–55 to +125	°C
VCC ²	1.5V DC core supply voltage		1.425 to 1.575	V
VJTAG	JTAG DC voltage		1.425 to 3.6	V
VPP	Programming voltage	Programming mode	3.15 to 3.45	V
VPP	Programming voltage	Operation³	0 to 3.6	V
VCCPLLx	Analog power supply (PLL)		1.425 to 1.575	V
VCCFPGAIOBx/ VCCMSSIOBx⁴	1.5V DC supply voltage		1.425 to 1.575	V
	1.8V DC supply voltage		1.7 to 1.9	V
	2.5V DC supply voltage		2.3 to 2.7	V
	3.3V DC supply voltage		3.0 to 3.6	V
	LVDS differential I/O		2.375 to 2.625	V
	LVPECL differential I/O		3.0 to 3.6	V
VCC33A⁵	Analog clean 3.3V supply to the analog circuitry		3.15 to 3.45	V
VCC33ADCx⁵	Analog 3.3V supply to ADC		3.15 to 3.45	V
VCC33AP⁵	Analog clean 3.3V supply to the charge pump		3.15 to 3.45	V
VCC33SDDx⁵	Analog 3.3V supply to sigma-delta DAC		3.15 to 3.45	V
VAREFx	Voltage reference for ADC		2.527 to 3.3	V
VCCRCOSC	Analog supply to the integrated RC oscillator		3.15 to 3.45	V
VDDBAT	External battery supply		2.7 to 3.63	V
VCCMAINXTAL⁵	Analog supply to the main crystal oscillator		3.15 to 3.45	V
VCCLPXTAL⁵	Analog supply to the low power 32 KHz crystal oscillator		3.15 to 3.45	V
VCCENVM	Embedded nonvolatile memory supply		1.425 to 1.575	V
VCCESRAM	Embedded SRAM supply		1.425 to 1.575	V
VCC15A²	Analog 1.5V supply to the analog circuitry		1.425 to 1.575	V
VCC15ADCx²	Analog 1.5V supply to the ADC		1.425 to 1.575	V

Note:

All parameters representing voltages are measured with respect to GND unless otherwise specified.
The following 1.5V supplies should be connected together while following proper noise filtering practices: VCC, VCC15A, and VCC15ADCx.
VPP can be left floating during operation (not programming mode).
The ranges given here are for power supplies only. The recommended input voltage ranges specific to each I/O standard are given in Table 2-19. VCCxxxxIOBx should be at the same voltage within a given I/O bank.
The following 3.3V supplies should be connected together while following proper noise filtering practices: VCC33A, VCC33ADCx, VCC33AP, VCC33SDDx, VCCMAINXTAL, and VCCLPXTAL.

Table 2-4. Embedded Flash Programming, Storage and Operating Limits
Product Grade	Storage Temperature	Element	Grade Programming Cycles	Retention
Military	Max. T_J = 125 °C	Embedded Flash	< 1,000	6 years
			< 10,000	3 years
			< 15,000	1.5 years

Figure 2-1. High Temperature Data Retention (HTR) for FPGA/FlashROM

Table 2-5. Overshoot and Undershoot Limits¹
VCCxxxxIOBx	Average VCCxxxxIOBx–GND Overshoot or Undershoot  Duration as a Percentage of Clock Cycle¹	Maximum Overshoot/ Undershoot (125°C)
2.7V or less	10%	0.72V
2.7V or less	5%	0.82V
3V	10%	0.72V
3V	5%	0.81V
3.3V	10%	0.69V
3.3V	5%	0.70V
3.6V	10%	—
3.6V	5%	—

Note:

The duration is allowed at one out of six clock cycles. If the overshoot/undershoot occurs at one out of two cycles, the maximum overshoot/undershoot has to be reduced by 0.15V.
This table does not provide PCI overshoot/undershoot limits.