2.15 Inter-Integrated Circuit (I2C) Characteristics
(Ask a Question)This section describes the DC and switching of the I2C interface. Unless otherwise noted, all output characteristics given are for a 100 pF load on the pins. For timing parameter definitions, refer to Inter-Integrated Circuit (I2C) Characteristics.
| Parameter | Definition | Condition | Value | Unit |
|---|---|---|---|---|
| VIL | Minimum input low voltage | — | SeeTable 2-37 | — |
| Maximum input low voltage | — | See Table 2-37 | — | |
| VIH | Minimum input high voltage | — | See Table 2-37 | — |
| Maximum input high voltage | — | See Table 2-37 | — | |
| VOL | Maximum output voltage low | IOL = 8 mA | See Table 2-37 | — |
| IIL | Input current high | — | See Table 2-37 | — |
| IIH | Input current low | — | See Table 2-37 | — |
| Vhyst | Hysteresis of Schmitt trigger inputs | — | See Table 2-33 | V |
| TFALL | Fall time 2 | VIHmin to VILMax, Cload = 400 pF | 15.0 | ns |
| VIHmin to VILMax, Cload = 100 pF | 4.0 | ns | ||
| TRISE | Rise time 2 | VILMax to VIHmin, Cload = 400pF | 19.5 | ns |
| VILMax to VIHmin, Cload = 100pF | 5.2 | ns | ||
| Cin | Pin capacitance | VIN = 0, f = 1.0 MHz | 8.0 | pF |
| Rpull-up | Output buffer maximum pull-down Resistance 1 | — | 50 | Ω |
| Rpull-down | Output buffer maximum pull-up Resistance 1 | — | 150 | Ω |
| Dmax | Maximum data rate | Fast mode | 400 | Kbps |
| tLOW | Low period of I2C_x_SCL 3 | — | 1 | pclk cycles |
| tHIGH | High period of I2C_x_SCL 3 | — | 1 | pclk cycles |
| tHD;STA | START hold time 3 | — | 1 | pclk cycles |
| tSU;STA | START setup time 3 | — | 1 | pclk cycles |
| tHD;DAT | DATA hold time 3 | — | 1 | pclk cycles |
| tSU;DAT | DATA setup time 3 | — | 1 | pclk cycles |
| tSU;STO | STOP setup time 3 | — | 1 | pclk cycles |
| tFILT | Maximum spike width filtered | — | 50 | ns |
Note:
- These maximum values are provided for information only. Minimum output buffer resistance values depend on VCCxxxxIOBx, drive strength selection, temperature, and process. For board design considerations and detailed output buffer resistances, use the corresponding IBIS models located on the Microchip website.
- These values are provided for a load of 100 pF and 400 pF. For board design considerations and detailed output buffer resistances, use the corresponding IBIS models located on the Microchip website.
- For allowable Pclk configurations, refer to the Inter-Integrated Circuit (I2C) Peripherals section in the SmartFusion Microcontroller Subsystem User’s Guide.
