2.3.4.1 3.3V LVTTL/3.3V LVCMOS

Low-Voltage Transistor–Transistor Logic (LVTTL) is a general-purpose standard (EIA/JESD) for 3.3V applications. It uses an LVTTL input buffer and push-pull output buffer.

Table 2-35. Minimum and Maximum DC Output Levels, 3.3V LVTTL/ 3.3V LVCMOS Applicable to FPGA I/O Banks
VOLVOLVOHVOHIOLIOHIOSLIOSH
Drive Strgth.Max.
VMax.
VMin.
VmAmAMax.
mA1Max.
mA1
–55 ≤ TJ ≤ 100 (°C)100 < TJ ≤ 125 (°C)–55 ≤ TJ ≤ 100 (°C)100 < TJ ≤ 125 (°C)–55 ≤ TJ≤ 125 (°C)–55 ≤ TJ ≤ 100 (°C)
2 mA0.40.42.42.4222725
4 mA0.40.42.42.4442725
6 mA0.40.42.42.4665451
8 mA0.40.42.42.4885451
12 mA20.40.42.42.41212109103
16 mA0.40.42.42.41616127132
24 mA0.40.442.42.162424181268
Note:
  1. Currents are measured at 100 °C junction temperature and maximum voltage.
  2. Denotes the software default selection. This note is applicable for the entire row.
Table 2-36. Minimum and Maximum DC Input Levels, 3.3V LVTTL/ 3.3V LVCMOS Applicable to FPGA I/O Banks
VILVIHIILIIH
Min.
VMax.
VMin.
VMax.
VµA1µA1
–55 ≤ TJ ≤ 125 (°C)–55 ≤ TJ ≤ 125 (°C)–55 ≤ TJ ≤ 125 (°C)
–0.30.823.61515
Note:
  1. Currents are measured at 125 °C junction temperature and maximum voltage.
Table 2-37. Minimum and Maximum DC Input and Output Levels Applicable to MSS I/O Banks
3.3V LVTTL / 
3.3V LVCMOSVILVIHVOLVOHIOLIOHIOSLIOSHIILIIH
Drive StrengthMin.
VMax.
VMin.
VMax.
VMax.
VMin.
VmAmAMax.
mA1Max.
mA1µA2µA2
8 mA3–0.30.823.60.42.48854511515
Note:
  1. Currents are measured at 100°C junction temperature and maximum voltage.
  2. Currents are measured at 125°C junction temperature.
  3. Denotes the software default selection. This note is applicable for the entire row.
Figure 2-16. AC Loading
Table 2-38. AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)Input High (V)Measuring Point1 (V)VREF (typ.) (V)CLOAD (pF)
03.31.4—35
Note:
  1. Measuring point = Vtrip. See Table 2-22 for a complete table of trip points.