48.6.21 MCAN Standard ID Filter Configuration
Settings for 11-bit standard Message ID filtering. The Standard ID Filter Configuration controls the filter path for standard messages as illustrated in Standard Message ID Filter Path.
This register can only be written if the bits CCE and INIT are set in MCAN CC Control Register.
| Name: | MCAN_SIDFC |
| Offset: | 0x84 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| LSS[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| FLSSA[13:6] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FLSSA[5:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 23:16 – LSS[7:0] List Size Standard
| Value | Description |
|---|---|
| 0 | No standard Message ID filter. |
| 1-128 | Number of standard Message ID filter elements. |
| >128 | Values greater than 128 are interpreted as 128. |
Bits 15:2 – FLSSA[13:0] Filter List Standard Start Address
Start address of standard Message ID filter list (32-bit word address, see Message RAM Configuration).
Write FLSSA with the bits [15:2] of the 32-bit address.