33.16.9 SMC Write Protection Status Register

Name: SMC_WPSR
Offset: 0xE8
Reset: 0x00000000
Property: Read-only

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
 WPVSRC[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 WPVSRC[7:0] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
        WPVS 
Access R 
Reset 0 

Bits 23:8 – WPVSRC[15:0] Write Protection Violation Source

When WPVS = 1, WPVSRC indicates the register address offset at which a write access has been attempted.

Bit 0 – WPVS Write Protection Violation Status

Note: When the write protection feature is enabled and a write attempt into a protected register is performed, the Write Protection Violation Source (WPVSRC) bit field in the SMC_WPSR register does not report the right violation source. As a consequence the value in the WPVSRC bit field is wrong. This issue does not affect the write protection feature itself which is fully functional.
ValueDescription
0 No write protection violation has occurred since the last read of the SMC_WPSR register.
1 A write protection violation has occurred since the last read of the SMC_WPSR register. If this violation is an unauthorized attempt to write a protected register, the associated violation is reported into field WPVSRC.