27.12.2 MDCON1

Modulation Control Register 1
Note:
  1. Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.
Name: MDCON1
Address: 0xF4D

Bit 76543210 
   CHPOLCHSYNC  CLPOLCLSYNC 
Access R/WR/WR/WR/W 
Reset 0000 

Bit 5 – CHPOL Modulator High Carrier Polarity Select bit

ValueDescription
1

Selected high carrier signal is inverted

0

Selected high carrier signal is not inverted

Bit 4 – CHSYNC Modulator High Carrier Synchronization Enable bit

ValueDescription
1

Modulator waits for a falling edge on the high time carrier signal before allowing a switch to the low time carrier

0

Modulator output is not synchronized to the high time carrier signal

Bit 1 – CLPOL Modulator Low Carrier Polarity Select bit

ValueDescription
1

Selected low carrier signal is inverted

0

Selected low carrier signal is not inverted

Bit 0 – CLSYNC Modulator Low Carrier Synchronization Enable bit

ValueDescription
1

Modulator waits for a falling edge on the low time carrier signal before allowing a switch to the high time carrier

0

Modulator output is not synchronized to the low time carrier signal

Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.