27.12.4 MDCARL
| Name: | MDCARL |
| Address: | 0xF4F |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CLS[3:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 | |||||
Bits 3:0 – CLS[3:0] Modulator Carrier Low Input Selection bits
| MDCARL | |
|---|---|
| CLS[2:0] | Connection |
| 1111 | CLC8_out |
| 1110 | CLC7_out |
| 1101 | CLC6_out |
| 1100 | CLC5_out |
| 1011 | CLC4_out |
| 1010 | CLC3_out |
| 1001 | CLC2_out |
| 1000 | CLC1_out |
| 0111 | PWM4 OUT |
| 0110 | PWM3 OUT |
| 0101 | CCP2 OUT |
| 0100 | CCP1 OUT |
| 0011 | CLKREF output |
| 0010 | HFINTOSC |
| 0001 | FOSC (system clock) |
| 0000 | Pin selected by MDCARLPPS |