21.9.6 TxRST
| Name: | TxRST |
| Address: | 0xFBF,0xFB9,0xFB3 |
Timer External Reset Signal Selection Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RSEL[4:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bits 4:0 – RSEL[4:0]
| Value | Description |
|---|---|
| n | See External Reset Sources table |
| Name: | TxRST |
| Address: | 0xFBF,0xFB9,0xFB3 |
Timer External Reset Signal Selection Register
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RSEL[4:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Value | Description |
|---|---|
| n | See External Reset Sources table |
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