2.3.11 3.3V PCI, 3.3V PCI-X

Peripheral Component Interface (PCI) for 3.3V standard specifies support for both 33 MHz and 66 MHz PCI bus applications. It uses an LVTTL input buffer and a push-pull output buffer. The input and output buffers are 5V tolerant with the aid of external components. Axcelerator 3.3V PCI and 3.3V PCI-X buffers are compliant with the PCI Local Bus Specification Rev. 2.1.

The PCI Compliance Specification requires the clamp diodes to be able to withstand for 11 ns, –3.5V in undershoot, and 7.1V in overshoot.

The following table lists the DC input and output levels of 3.3V PCI and 3.3V PCI-X.

Table 2-37. DC Input and Output Levels
StandardVILVIHVOLVOHIOLIOH
Min. VMax. VMin. VMax. VMax. VMin. VmAmA
PCI–0.30.3 VCCI0.5 VCCIVCCI + 0.5(per PCI specification)
PCI-X–0.50.35 VCCI0.5 VCCIVCCI + 0.5(per PCI specification)