19.4 Functional Safety

The following Functional Safety features are included:

Execution of SLEEP automatically clears the Sleep Enable (SEN) bit in the Control A (CTRLA) register to increase robustness against inadvertent sleep
Execution of SLEEP requires the Global Interrupt Enable (I) bit in the CPU Status Register (CPU.SREG) register to be set to ‘1’, otherwise an error is flagged in the Interrupt Flags (INTFLAGS) register

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