11.3.2.2 Checking of Protective Signals

The bus initiator checks the following signals:

Parity of read data
Bus error response from data bus

The bus matrix checks the parity of addresses mapped to the I/O bus bridge to ensure that the initiator select signals generated from this address are correct. Address parity on high-speed bus addresses is not checked by the bus matrix but is left to the high-speed bus targets.

The target checks the following signals:

Parity on address
Parity on write data
Consistency of bus control signals

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.