32.5.1 Control A


Bit	7	6	5	4	3	2	1	0
		RUNSTDBY	CASCADE	SYNCUPD	CLKSEL[2:0]			ENABLE
Access		R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset		0	0	0	0	0	0	0

Bit 6 – RUNSTDBY Run Standby

Writing a ‘1’ to this bit enables the peripheral to run in Standby sleep mode.

Value	Description
0	The peripheral will not run in Standby
1	The peripheral will run in Standby

Bit 5 – CASCADE Cascade Two Timer/Counters

This bit controls whether the peripheral will be used for the Most Significant Bytes (MSBs) in cascading of two 16-bit Timer/Counters type B (TCBn) for 32-bit operation through the Event System.

Value	Description
0	The peripheral is used for 16-bit operation or used for the two Least Significant Bytes (LSBs) in 32-bit operation
1	The peripheral is used for the two MSBs in 32-bit operation

Bit 4 – SYNCUPD Synchronize Update

This bit controls whether the peripheral is synchronized with a TCA. Which TCA instance is controlled by CLKSEL, for all other clock selections than TCAn the peripheral will be synchronized with TCA0.

Value	Description
0	The peripheral is not synchronized
1	The peripheral will restart whenever TCAn is restarted or overflows. This can be used to synchronize capture with the PWM period

Bits 3:1 – CLKSEL[2:0] Clock Select

This bit field controls the clock source for this peripheral.

Value	Name	Description
0x0	DIV1	CLK_PER
0x1	DIV2	CLK_PER / 2
0x2	TCA0	CLK_TCA from TCA0
0x3-0x6	-	Reserved
0x7	EVENT	Positive edge on event input

Bit 0 – ENABLE Enable

Writing a ‘1’ to this bit enables the Timer/Counter type B peripheral.

Name:	CTRLA
Offset:	0x00
Reset:	0x00
Property:	-