41.3.5 Interrupts
| Vector Name | Source Name | Condition | Dependency |
|---|---|---|---|
| ADCn_ERROR | TRIGOVR | A new conversion is triggered while another is in progress | |
| SAMPOVR | A new conversion overwrites an unread sample in the Sample (ADCn.SAMPLE) register | ||
| RESOVR | A new conversion or accumulation overwrites an unread result in the Result (ADCn.RESULT) register | ||
| ADCn_RESRDY | RESRDY | A new result is available in the Result (ADCn.RESULT) register | |
| WCMP | A conversion or accumulation matches the conditions set by the window comparator | The Window Source (WINSRC) bit in the Control D (ADCn.CTRLD) register is
‘0’ | |
| ADCn_SAMPRDY | SAMPRDY | A new sample is available in the Sample (ADCn.SAMPLE) register | |
| WCMP | A sample matches the conditions set by the window comparator | The WINSRC bit in ADCn.CTRLD is ‘1’ |
When an interrupt condition occurs, the corresponding interrupt flag is set in the peripheral’s Interrupt Flags (peripheral.INTFLAGS) register.
An interrupt source is enabled or disabled by writing to the corresponding enable bit in the peripheral’s Interrupt Control (peripheral.INTCTRL) register.
An interrupt request is generated when the corresponding interrupt source is enabled, and the interrupt flag is set. The interrupt request remains active until the interrupt flag is cleared. See the peripheral’s INTFLAGS register for details on how to clear interrupt flags.