36.6.5 Interrupt Enable Clear

This register allows the user to disable an interrupt without doing a read-modify-write operation. Changes in this register will also be reflected in the Interrupt Enable Set (INTENSET) register.

Name:	INTENCLR
Offset:	0x24
Reset:	0x00000000
Property:	Local Write-Protection


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
				WIN0			COMP1	COMP0
Access				R/W			R/W	R/W
Reset				0			0	0

Bit 4 – WINn Window n Interrupt Enable

Writing a ‘0’ to this bit has no effect.

Writing a ‘1’ to this bit will clear the Window n Interrupt Enable bit, which disables the Window n interrupt.

Value	Description
0	The Window n interrupt is disabled
1	The Window n interrupt is enabled

Bits 0, 1 – COMPn Comparator n Interrupt Enable

Writing a ‘0’ to this bit has no effect.

Writing a ‘1’ to this bit will clear the Comparator n Interrupt Enable bit, which disables the Comparator n interrupt.

Value	Description
0	The Comparator n interrupt is disabled
1	The Comparator n interrupt is enabled