37.3 Operating Frequencies and Thermal Limitations

Table 37-2. Operating Frequency vs. Voltage
Param. No.	V_DDIO, V_DDIO2, AVDD Range	Temp. Range	Max MCU Frequency	Comments
DC_5	1.8V to 5.5V	-40°C to +85°C	24 Mhz	Industrial

Table 37-3. Thermal Operating Conditions
Rating	Symbol	Min.	Typ.	Max.	Unit
Industrial Temperature Devices
Operating ambient temperature range	T_A	-40	—	85	°C
Power Dissipation
Internal chip power dissipation: P_INT = (V_DDIO2 x (I_DD - Σ I_OHVDDIO2)) + ( AVDD x (I_DDANA - Σ I_OHAVDD) + (V_DD x (I_DD - Σ I_OHVDD)) I/O pin power dissipation: P_I/O = ∑ ((V_DDIO2 – V_OHVDDIO2) x I_OHVDDIO2) + ∑ (V_OL x I_OLVDDIO2) + ∑ ((AVDD – V_OHAVDD) x I_OHAVDD) + ∑ (V_OL x I_OLAVDD) + ∑ ((V_DD – V_OHVDD) x I_OHVDD) + ∑ (V_OL x I_OLVDD)	P_D	P_INT + P_I/O			W
Maximum allowed power dissipation	PDMAX	(T_J – T_A)/θJA			W

Table 37-4. Thermal Packaging Characteristics⁽¹⁾
Characteristics	Symbol	Typ.	Max.	Unit
Thermal resistance for the 28-pin VQFN Wettable Flanks (4 x 4 x 1.0 mm) package	θJA	22.59	—	°C/W
Thermal resistance for the 28-pin SSOP (5.30 mm) package	θJA	57.3	—	°C/W
Thermal resistance for the 28-pin SPDIP (0.300) package	θJA	60.0	—	°C/W
Thermal resistance for the 32-pin TQFP (7 x 7 x 1.0 mm) package	θJA	56.63	—	°C/W
Thermal resistance for the 32-pin VQFN Wettable Flanks (5 x 5 x 0.9 mm) package	θJA	27.56	—	°C/W
Thermal resistance for the 48-pin TQFP (7 x 7 x 1.0 mm) package	θJA	62.8	—	°C/W
Thermal resistance for the 48-pin VQFN Wettable Flanks (6 x 6 x 0.9 mm) package	θJA	24.8	—	°C/W
Thermal resistance for the 64-pin TQFP (10 x 10 x 1.0 mm) package	θJA	49.83	—	°C/W
Thermal resistance for the 64-pin VQFN Wettable Flanks (9 x 9 x 1.0 mm) package	θJA	19.67	—	°C/W
Note: Junction to ambient thermal resistance Theta-JA (θJA), values are obtained through package simulations.