37.15 SERCOM Inter-Integrated Circuit (SERCOM I²C) Electrical Specifications

Figure 37-6. I²C Start/Stop Bits Host Mode Timing Diagrams

Figure 37-7. I²C Bus Data Host Mode Timing Diagrams

Table 37-26. I²C Host Mode Electrical Specifications
Standard operating conditions: V_DDIO = AVDD = 1.8V to 5.5V (Unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics⁽¹⁾		Min.	Max.	Units	Conditions
I2CM_1	t_L0:SCL	Host Clock Low Time	100 kHz mode	4.7	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	1.3	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.5	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	320	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_3	t_HI:SCL	Host Clock High Time	100 kHz mode	4.0	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	120	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	60	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_5	t_F:SCL	SDAx and SCLx Fall Time	100 kHz mode	—	300	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	—	300	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	—	120	ns	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	—	80	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	—	40	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_7	t_R:SCL	SDAn and SCLn Rise Time	100 kHz mode	—	1000	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	—	300	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	—	120	ns	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	—	80	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	—	40	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_9	t_SU:DAT	Data Setup Time	100 kHz mode	250	—	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	100	—	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	50	—	ns	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	10	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	10	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_11	t_HD:DAT⁽¹⁾	Data Hold Time	100 kHz mode	300	—	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	300	—	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	300	—	ns	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	5.0	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	5.0	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_13	t_SU:STA	Start Condition Setup Time	100 kHz mode	4.7	—	µs	V_DDIO= 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	V_DDIO= 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	160	—	ns	V_DDIO= 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_15	t_HD:STA	Start Condition Hold Time	100 kHz mode	4.0	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO2 = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_17	t_SU:ST0	Stop Condition Setup Time	100 kHz mode	4.0	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_21	t_AA:SCL	Output Valid from Clock	100 kHz mode	—	3.45	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	—	0.9	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	—	0.45	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	—	100	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	—	100	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CM_23	t_BF:SDA⁽²⁾	Bus Free Time	100 kHz mode	4.7	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	1.3	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.5	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	320	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
Note: Longest delay between data hold timing based on bit field SDAHOLD of register CTRLA from SERCOM module and timing based on four periods of GCLK_SERCOM for 100 kHz/400 kHz/1 MHz mode. The amount of time the bus must be free before a new transmission starts (from STOP condition to START condition).

Figure 37-8. I²C Start/Stop Bits Client Mode Timing Diagram

Figure 37-9. I²C Bus Data Client Mode Timing Diagrams

Table 37-27. I²C Client Mode AC Electrical Specifications
Standard Operating Conditions: V_DDIO = AVDD = 1.8V to 5.5V (Unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics⁽¹⁾		Min.	Max.	Units	Conditions
I2CS_1	t_L0:SCL	Host Clock Low Time	100 kHz mode	4.7	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	1.3	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.5	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz	320	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO= 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_3	t_HI:SCL	Host Clock High Time	100 kHz mode	4.0	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	120	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	60	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_5	t_F:SCL	SDAx and SCLx Fall Time	100 kHz mode	—	300	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	—	300	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	—	120	ns	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz	—	80	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	—	40	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_7	t_R:SCL	SDAx and SCLx Rise Time	100 kHz mode	—	1000	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	—	300	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	—	120	ns	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz	—	80	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	—	40	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_9	t_SU:DAT	Data Setup Time	100 kHz mode	250	—	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	100	—	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	50	—	ns	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz	10	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	10	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_11	t_HD:DAT⁽¹⁾	Data Hold Time	100 kHz mode	300	—	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	300	—	ns	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	300	—	ns	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz	5.0	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	5.0	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_13	t_SU:STA	Start Condition Setup Time	100 kHz mode	4.7	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_15	t_HD:STA	Start Condition Hold Time	100 kHz mode	4.0	—	µs	_VDDIO = 5.0V, I_PULL-UP = 3 ma, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	_VDDIO = 5.0V, I_PULL-UP = 3 ma, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	V_DDIO = 5.0V, I_PULL-UP = 20 ma, C_LOAD = 550 pF
			3.4 MHz mode	160	—	ns	V_DDIO = 5.0V, I_PULL-UP = 20 ma, C_LOAD = 100 pF
I2CS_17	t_SU:ST0	Stop Condition Setup Time	100 kHz mode	4.0	—	µs	V^DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	V^DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_21	t_AA:SCL	Output Valid from Clock	100 kHz mode	—	3.45	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	—	0.9	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	—	0.45	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	—	100	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	—	100	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
I2CS_23	t_BF:SDA⁽²⁾	Bus Free Time	100 kHz mode	4.7	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			400 kHz mode	1.3	—	µs	V_DDIO = 3.3V, I_PULL-UP = 3 mA, C_LOAD = 400 pF
			1 MHz mode	0.5	—	µs	V_DDIO = 3.3V, I_PULL-UP = 20 mA, C_LOAD = 550 pF
			1.7 MHz mode	320	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 400 pF
			3.4 MHz mode	160	—	ns	V_DDIO = 3.3V, I_PULL-UP = 12 mA, C_LOAD = 100 pF
Note: Longest delay between data hold timing based on bit field SDAHOLD of register CTRLA from SERCOM module and timing based on four period of GCLK_SERCOM for 100 kHz/400 kHz/1 MHz mode. The amount of time the bus must be free before a new transmission starts (from STOP condition to START condition).

37.15 SERCOM Inter-Integrated Circuit (SERCOM I2C) Electrical Specifications

37.15 SERCOM Inter-Integrated Circuit (SERCOM I²C) Electrical Specifications