37.10 Analog-to-Digital Converter (ADC) Electrical Specifications

Table 37-17. ADC Electrical Specifications
Standard operating conditions: V_DDIO = AVDD = 1.8V to 5.5V (Unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
Device Supply
ADC_1	AVDD	ADC module supply	AVDD(min)	—	AVDD(max)	V
Reference Inputs
ADC_3	V_REF⁽¹⁾	ADC reference voltage	The greater of ≥ AVDD(min) or 2.4V	—	AVDD	V	External reference
ADC_3	V_REF⁽¹⁾	ADC reference voltage	The greater of ≥ AVDD(min) or 2.4V	—	AVDD	V	Internal reference
ADC_5	I_VREF	External V_REF input load current	—	—	—	µA	@ f_CNV(max) w/V_REF input buffer disabled or bypassed
Analog Input Range
ADC_7	AFS	Full-scale analog input signal range	AGND	—	V_REF	V	Single-ended mode
ADC_7	AFS	Full-scale analog input signal range	-V_REF	—	+V_REF	V	Differential mode
ADC_9	V_CMIN	Input common mode voltage	AGND	—	AVDD	V
ADC_11	t_SETTLING	ADC stabilization time	—	10	—	µs
Note: ADC functional device operation with either internal or external V_REF < 2.4V is functional, but not characterized. ADC will function, but with degraded accuracy of approximately ~((0.006 * 2ⁿ)/V_REF) LSB’s over full scale range, where "n" is the number of bits. ADC accuracy is limited by internal V_REF accuracy and drift, MCU-generated noise and the user’s application noise/accuracy on AVDD, AGND.

Table 37-18. ADC Single-Ended Mode AC Electrical Specifications
Standard operating conditions: V_DDIO = AVDD = 3.0V (Unless otherwise stated) Operating temperature: T_A = 25°C
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
Single Ended Mode ADC Accuracy⁽⁴⁾
SADC_11	Res	Resolution	8	—	12	bits	Selectable 8-, 10-, 12-bit resolution ranges
SADC_13	E_NOB ^(1,2)	Effective number of bits	—	9.3	—	bits	12-bit, 800 ksps, Internal V_REF
SADC_15			—	9.3	—	bits	10-bit, 930 ksps, Internal V_REF
SADC_17			—	7.8	—	bits	8-bit, 1000 ksps, Internal V_REF
SADC_19	INL	Integral nonlinearity	—	4	—	LSb	12-bit, 800 ksps, Internal V_REF
SADC_25	DNL	Differential nonlinearity	—	1	—	LSb	12-bit, 800 ksps, Internal V_REF
SADC_31	G_ERR	Gain error	—	3.5	—	LSb	12-bit, 800 ksps, Internal V_REF
SADC_37	E_OFF	Offset error	—	6	—	LSb	12-bit, 800 ksps, Internal V_REF
Single Ended Mode ADC Dynamic Performance^(1,2,4)
SADC_49	SINAD	Signal-to-noise and distortion	—	58	—	dB	V_REF = AVDD = V_DD = 3.0V @ 12-bit maximum sampling rate
SADC_51	SNR	Signal-to-noise ratio	—	65	—
SADC_53	SFDR	Spurious-free dynamic range	—	50	—
SADC_55	THD⁽³⁾	Total harmonic distortion	—	59	—
Characterized with an analog input sine wave = (F_TP(max)/100). For example, F_TP(max) = 1 Msps/100 = 10 kHz sine wave. Sine wave peak amplitude is 96% of the ADC full-scale input amplitude with 12-bit resolution. The value taken over seven harmonics. The ADC is configured in 12-bit mode. All registers are at the reset default value unless otherwise stated.

Table 37-19. ADC Differential Mode AC Electrical Specifications
Standard operating conditions: V_DDIO = AVDD = 3.0V (Unless otherwise stated) Operating temperature: T_A = 25°C
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
Differential Mode ADC Accuracy⁽⁴⁾
DADC_11	Res	Resolution	8	—	12	bits	Selectable 8-, 10-, 12-bit resolution ranges
DADC_13	E_NOB^(1,2)	Effective number of bits	—	10.1	—	bits	12-bit, 800 ksps, Internal V_REF
DADC_15			—	9.5	—	bits	10-bit, 930 ksps, Internal V_REF
DADC_17			—	7.9	—	bits	8-bit, 1000 ksps, Internal V_REF
DADC_19	INL	Integral nonlinearity	—	2.5	—	LSb	12-bit, 800 ksps, Internal V_REF
DADC_25	DNL	Differential nonlinearity	—	1.0	—	LSb	12-bit, 800 ksps, Internal V_REF
DADC_31	G_ERR	Gain error	—	1.2	—	LSb	12-bit, 800 ksps, Internal V_REF
DADC_37	E_OFF	Offset error	—	0.7	—	LSb	12-bit, 800 ksps, Internal V_REF
Differential Mode ADC Dynamic Performance^(1,2,4)
DADC_49	S_INAD	Signal to noise and distortion	—	62	—	dB	V_REF = AVDD = V_DD = 3.0V @ 12-bit max sampling rate
DADC_51	S_NR	Signal to noise ratio	—	68	—
DADC_53	S_FDR	Spurious free dynamic range	—	63	—
DADC_55	T_HD⁽³⁾	Total harmonic distortion	—	63	—
Note: Characterized with an analog input sine wave = (F_TP (max)/100). For example, F_TP(max) = 1 Msps/100 = 10 kHz sine wave. Sine wave peak amplitude is 96% of the ADC full-scale input amplitude with 12-bit resolution. The value taken over seven harmonics. The ADC is configured in 12-bit mode. All registers are at the reset default value unless otherwise stated.

Table 37-20. ADC Conversion and Sample Electrical Specifications
Standard operating conditions: V_DDIO = AVDD = 1.8V to 5.5V (Unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
ADC Clock Requirements
ADC_57	T_AD	ADC clock period	83	—		ns
ADC_58	f_{GCLK_ADCn}	ADCn module GCLK maximum input frequency	—	—	FCLK_51	MHz
ADC Single-Ended Throughput Rates
ADC_59	F_TP⁽¹⁾ (single-ended mode)	Throughput Rate (single-ended)	—	—	800	ksps	12-bit resolution
			—	—	930		10-bit resolution
			—	—	1000		8-bit resolution
ADC Differential Mode Throughput Rates
ADC_61	F_TP⁽¹⁾ (differential mode)	Throughput rate (differential mode)	—	—	800	ksps	12-bit resolution
			—	—	930		10-bit resolution
			—	—	1000		8-bit resolution