26.4.2.3.4 Command and Data Interface

Reading from the Flash is handled with AHB read transfers. Writing and erasing is performed by writing a command to the Command bit field in the Control B register (CTRLB.CMD), and then writing the desired word data to the desired address in the memory array.

To issue a command, the CTRLB.CMD bits must be written along with the Command Execution bit field in the Control B register (CTRLB.CMDEX). When a command is issued, the Ready flag in the Interrupt Flag Status and Clear register (INTFLAG.READY) will be cleared until the command has completed. Any commands written while INTFLAG.READY is low will be ignored, and the Programming Error Status bit in the Status register (STATUS.PROGE) will be set. If Self-Programming is used, before entering any sleep mode, ensure that any commands written to the NVM controller have completed by confirming that INTFLAG.READY is '1'.

Erasing the entire Flash (i.e. Chip Erase) cannot be done by the application when Debug Access Level (DAL) is 0, it can only be performed through the boot ROM interface from an external debugger or programmer.

To perform an operation (write/erase) in the NVM:
  1. Confirm that any previous operation is completed by reading the INTFLAG.READY flag.
  2. Unprotect the NVMCTRL registers by clearing the Write Protection Enable bit in the Write Protection Control register (WPCTRL.WPEN).
  3. Write the desired command value to the CTRLB.CMD bit field.
  4. Write to the correct address in the array to start the operation.
  5. Wait for INTFLAG.READY to be set to confirm that the operation is done
  6. Write the NOOP or NOCMD command to the CTRLB.CMD bit field to clear the current command.
  7. Protect the NVMCTRL registers by setting the WPCTRL.WPEN bit.
To execute a command in the NVM:
  1. Confirm that any previous operation is completed by reading the INTFLAG.READY flag.
  2. Unprotect the NVMCTRL registers by clearing the WPCTRL.WPEN bit.
  3. Write the desired command value to the CTRLB.CMD bit field.