17.6.8 Peripheral Interrupt Flag Status and Clear C
| Name: | INTFLAGC |
| Offset: | 0x1C |
| Reset: | 0x00000000 |
| Property: | – |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SYSCTRL | PTC | CCL | AC | ||||||
| Access | R/W | R/W | R/W | R/W | |||||
| Reset | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ADC0 | TCC0 | TC2 | TC1 | TC0 | SERCOM1 | SERCOM0 | EVSYS | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 11 – SYSCTRL SYSCTRL Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while
accessing the peripheral associated with the respective INTFLAGC bit, and will
generate an interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or
Interrupt Enable Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
Bit 10 – PTC PTC Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while accessing the
peripheral associated with the respective INTFLAGC bit, and will generate an
interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or Interrupt Enable
Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
Bit 9 – CCL CCL Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while accessing the
peripheral associated with the respective INTFLAGC bit, and will generate an
interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or Interrupt Enable
Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
Bit 8 – AC AC Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while accessing the
peripheral associated with the respective INTFLAGC bit, and will generate an
interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or Interrupt Enable
Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
Bit 7 – ADC0 ADC0 Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while accessing the
peripheral associated with the respective INTFLAGC bit, and will generate an
interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or Interrupt Enable
Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
Bit 6 – TCCn TCCn Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while accessing the
peripheral associated with the respective INTFLAGC bit, and will generate an
interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or Interrupt Enable
Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
Bits 3, 4, 5 – TCn TCn Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while accessing the
peripheral associated with the respective INTFLAGC bit, and will generate an
interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or Interrupt Enable
Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
Bits 1, 2 – SERCOMn SERCOMn Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while accessing the
peripheral associated with the respective INTFLAGC bit, and will generate an
interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or Interrupt Enable
Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
Bit 0 – EVSYS EVSYS Peripheral Interrupt Flag
A flag is cleared by writing a ‘1’ to it.
A flag is set when a Peripheral Access Error occurs while accessing the
peripheral associated with the respective INTFLAGC bit, and will generate an
interrupt request if Interrupt Enable Set (INTENSET.ERR) bit or Interrupt Enable
Clear (INTENCLR.ERR) bit is ‘1’.
Writing a ‘0’ to a bit has no effect.
Writing a ‘1’ to a bit will clear the corresponding interrupt
flag.
