6.4 Operation

Data memory addresses between 0x0000 and 0x3FFF are reserved for the device Special Function Registers (SFRs). The SFRs include control and status bits for the CPU and peripherals on the device. Data space memory map is shown in Figure 6-1.

The RAM begins at address 0x4000 and is split into two blocks, X and Y data spaces. For data writes, the X and Y data memory spaces are always accessed as a single, linear data space. For data reads, the X and Y data memory spaces can be accessed independently or as a single, linear space. Data reads for MCU class instructions always access the X and Y data spaces as a single combined data space. Dual source operand DSP instructions, such as the MAC instruction, access the X and Y data spaces separately to support simultaneous reads for the two source operands. MCU instructions can use any W register as an address pointer for a data read or write operation.