11.3 Interrupt Vector Table

The Interrupt Vector Table (IVT) resides in the program memory. The IVT contains interrupt vectors plus six processor trap vectors. In general, each interrupt source has its own vector. Each interrupt vector contains a 24-bit wide address. The value programmed into each interrupt vector location is the starting address of the associated Interrupt Service Routine (ISR). See Table 11-1 for interrupt vector details.

The processor core is responsible for performing the interrupt bus cycle: the reading of the IVT and transferring the address contained in the interrupt vector to the program counter. The interrupt vector is transferred from the program data bus into the program counter via a 24-bit wide multiplexer on the input of the program counter.

The peripheral IVT is relocatable using a SFR (IVTBASE) to set the base address. At a device Reset, the base address value is “0x800000”. The IVT starts at address 0x800000, and code execution begins at the address specified in the Reset vector at 0x800000. The IVT is shown in Figure 11-1.

The user can choose an alternate IVT table based on IVTBASE value. This allows the erasing and reprogramming of user code without affecting the vector table. This is useful in various software update scenarios.