10.4.21 Interrupt Enable Register 0

Name: IEC0
Offset: 0xC0

Bit 3130292827262524 
 CRYPT2IECRYPT1IE WDTIE CM4CNTIECM4SATIECM4WARNIE 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 
Bit 2322212019181716 
 CM4FAILIECM3CNTIECM3SATIECM3WARNIEC3FAILIECM2CNTIECM2SATIECM2WARNIE 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 C2FAILIECM1CNTIECM1SATIECM1WARNIECM1FAILIECLKERRIECLKFAILIE  
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 
Bit 76543210 
 NVMCRCIENVMIENVMECCIEPBERRIEYRAMECCIEXRAMECCIECPUFPUIE  
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 

Bit 31 – CRYPT2IE Crypto Module Interrupt 2 Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 30 – CRYPT1IE Crypto Module Interrupt 1 Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 28 – WDTIE Watchdog Timer Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 26 – CM4CNTIE Clock Monitor 4 Count Ready Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 25 – CM4SATIE Clock Monitor 4 Saturation Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 24 – CM4WARNIE Clock Monitor 4 Clock Warning Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 23 – CM4FAILIE Clock Monitor 4 Clock Failure Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 22 – CM3CNTIE Clock Monitor 3 Count Ready Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 21 – CM3SATIE Clock Monitor 3 Saturation Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 20 – CM3WARNIE Clock Monitor 3 Clock Warning Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 19 – C3FAILIE Clock Monitor 3 Clock Failure Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 18 – CM2CNTIE Clock Monitor 2 Count Ready Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 17 – CM2SATIE Clock Monitor 2 Saturation Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 16 – CM2WARNIE Clock Monitor 2 Clock Warning Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 15 – C2FAILIE Clock Monitor 2 Clock Failure Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 14 – CM1CNTIE Clock Monitor 1 Count Ready Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 13 – CM1SATIE Clock Monitor 1 Saturation Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 12 – CM1WARNIE Clock Monitor 1 Clock Warning Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 11 – CM1FAILIE Clock Monitor 1 Clock Failure Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 10 – CLKERRIE Clock Error Interrupt (combined) Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 9 – CLKFAILIE Clock Fail Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 7 – NVMCRCIE NVM CRC Operation Completed Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 6 – NVMIE NVM Program/Erase Op Completed or Terminated bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 5 – NVMECCIE NVM Data ECC SEC and/or Instruction SEC Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 4 – PBERRIE PBU Parity Error Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 3 – YRAMECCIE YRAM data ECC SEC Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 2 – XRAMECCIE XRAM Data ECC SEC Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.

Bit 1 – CPUFPUIE CPU/FPU Interrupt Enable bit

ValueDescription
1 Interrupt is enabled.
0 Interrupt is disabled.