20.10.2.1 Configuration Procedure

Before configuring asynchronous partial wake-up for a peripheral, check that PIDx in PMC_CSR is set. This ensures that the peripheral clock is enabled.

The steps to enable asynchronous partial wake-up for a peripheral are the following:

  1. Check that PMC_SLPWKCR.ASR is set to ‘0’ for the corresponding peripheral. This ensures that the peripheral has no activity in progress.
  2. Enable asynchronous partial wake-up for the peripheral by writing a ‘1’ to PMC_SLPWKCR.SLPWKSR.
  3. Check that PMC_SLPWKCR.ASR is set to ‘0’. This ensures that no activity has started during the enable phase.
  4. In the PMC_SLPWKCR, asynchronous partial wake-up must be immediately disabled by writing a ‘0’ to SLPWKSR. Wait for the end of peripheral activity before reinitializing the procedure. 
If the corresponding PIDx bit is set to ‘0’, then the peripheral clock is disabled and the system can then be placed in Wait mode.

Before entering Wait mode, check that AIP in the Partial Wake-Up Activity In Progress register (PMC_SLPWK_AIPR) is cleared. This ensures that none of the peripherals is currently active.

Note: When asynchronous partial wake-up is enabled for a peripheral and the core is running (system not in Wait mode), the peripheral must not be accessed before a wake-up of the peripheral is performed.