22.6.1 RTC Control Register

This register can only be written if the WPEN bit is cleared in the System Controller Write Protection Mode Register (SYSC_WPMR).

Name:	RTC_CR
Offset:	0x00
Reset:	0x00000000
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
							CALEVSEL[1:0]
Access							R/W	R/W
Reset							0	0


Bit	15	14	13	12	11	10	9	8
							TIMEVSEL[1:0]
Access							R/W	R/W
Reset							0	0


Bit	7	6	5	4	3	2	1	0
							UPDCAL	UPDTIM
Access							R/W	R/W
Reset							0	0

Bits 17:16 – CALEVSEL[1:0] Calendar Event Selection

The event that generates the flag CALEV in RTC_SR depends on the value of CALEVSEL

In UTC mode, this field has no effect on the RTC_SR.

Value	Name	Description
0	WEEK	Week change (every Monday at time 00:00:00)
1	MONTH	Month change (every 01 of each month at time 00:00:00)
2	YEAR	Year change (every January 1 at time 00:00:00)
3	–	Reserved

Bits 9:8 – TIMEVSEL[1:0] Time Event Selection

The event that generates the flag TIMEV in RTC_SR depends on the value of TIMEVSEL.

In UTC mode, this field has no effect on the RTC_SR.

Value	Name	Description
0	MINUTE	Minute change
1	HOUR	Hour change
2	MIDNIGHT	Every day at midnight
3	NOON	Every day at noon

Bit 1 – UPDCAL Update Request Calendar Register

Calendar counting consists of day, date, month, year and century counters. Calendar counters can be programmed once this bit is set and acknowledged by RTC_SR.ACKUPD.

In UTC mode, this field has no effect on the RTC_SR.

Value	Name	Description
0	STOP_UPDATE	No effect or, if UPDCAL has been previously written to 1, stops the update procedure.
1	START_UPDATE	Stops the RTC calendar counting.

Bit 0 – UPDTIM Update Request Time Register

Value	Name	Description
0	STOP_UPDATE	No effect or, if UPDTIM has been previously written to 1, stops the update procedure.
1	START_UPDATE	Stops the RTC time counting. Second, minute and hour counters can be programmed once this bit is set and acknowledged by RTC_SR.ACKUPD.