22.6.18 RTC First Stamping Time Register x
This configuration is relevant only if RTC_MR.UTC = 0.
RTC_FSTRx reports the timestamp time of the first tamper event that occurred on TMPx after the last read of RTC_LSDRx.
| Name: | RTC_FSTRx |
| Offset: | 0x40 + x*0x10 [x=0..4] |
| Reset: | 0x00000000 |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| BACKUP | TEVCNT[3:0] | ||||||||
| Access | R | R | R | R | R | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| AMPM | HOUR[5:0] | ||||||||
| Access | R | R | R | R | R | R | R | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| MIN[6:0] | |||||||||
| Access | R | R | R | R | R | R | R | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SEC[6:0] | |||||||||
| Access | R | R | R | R | R | R | R | ||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | ||
Bit 31 – BACKUP System Mode of the Tamper (cleared by reading RTC_LSDRx)
| Value | Description |
|---|---|
| 0 | The system is not in Backup mode when the tamper event occurs. |
| 1 | The system is in Backup mode when the tamper event occurs. |
Bits 27:24 – TEVCNT[3:0] Tamper Events Counter (cleared by reading RTC_LSDRx)
Each time a tamper event occurs, this counter is incremented. This counter saturates at 15. Once this value is reached, it is no longer possible to know the exact number of tamper events.
If this field is not null, at least one tamper event has occurred since the last register reset and the values stored in RTC_FSTRx, RTC_FSDRx, RTC_LSTRx, RTC_LSDRx registers are valid.