21.5.1.1 Privileged/User IO Access Management

Safety/security can be reinforced for the configuration and access of I/O lines. This safety/security enhancement is related to the Privileged-/User Access modes offered by the CPU core. This Privileged-Access mode prevents an unexpected access performed by a non-privileged software task/process to modify the configuration of any I/O considered relevant for safety/security. The Privileged-Access mode does not protect against an abnormal access resulting from a Single-event upset that may corrupt the value of 1 bit on the system bus. To prevent these events, see section I/O Line Configuration Freeze and section Register Write Protection.

The user must first configure the configuration and control access level for the I/O line. Each I/O line of each I/O group must be configured to be accessed either in Privileged-Access mode or User-Access mode.

Each I/O line of the I/O group x can be set as User-Access mode I/O line by writing a 1 to the corresponding bit P0–P31 of the PIO Privilege Set I/O User Access Register (PIO_P_SIO_UARx) of the I/O group x.

To define an I/O line of I/O group x as a Privileged-Access mode I/O line, write a 1 to the corresponding bit P0–P31 of the PIO Privilege Set I/O Privilege Access Register (PIO_P_SIO_PARx) of the I/O group x.

Examples:

To set the I/O line PA4 as User access line:

  • Write the value 16 (bit 4 at 1) at address 0x10B0 (PIO_P_SIO_UAR0)

To set the I/O line PB3 as Privilege access line:

  • Write the value 8 (bit 3 at 1) at address 0x1074 (PIO_P_SIO_PAR1)

The access level of each I/O line is reported by the PIO Privilege I/O Security Status register (PIO_P_IOSSRx) of the corresponding I/O group. Reading 0 at the corresponding bit P0–P31 means that the corresponding I/O line of the I/O group is configured in Privileged-Access mode. Reading 1 means that this I/O line of the I/O group is configured in User-Access mode.

The PIO Controller user interface is divided into two register mapping areas:

  • The User-Access area, located from address 0x0 to 0x1000, can be accessed by the CPU core. This area interfaces with all the I/O lines defined as User-Access. Trying to access to I/O line configured in Privileged-Access mode through this area will have no effect on the I/O line and read values will be 0.
  • The Privileged-Access area, located above address 0x1000, can only be accessed by the CPU core configured in Privileged-Access mode (if the PIO Controller is defined as a privileged-access client peripheral at the system bus matrix level). This area interfaces with all the I/O lines configured to be accessed in Privileged-Access mode. Trying to access an I/O line configured to be accessed in User-Access mode through this area will have no effect on the I/O line and read values will be 0.