14.2.2.1 GPNVM Bits Overview
For more information on using GPNVM bits, refer to GPNVM Bits.
| GPNVM Bit Number | Value | Function |
|---|---|---|
| Security bit | ||
| 0 | – | When set to 1, the security bit can only be erased by the ERASE signal |
| Memory Plane Selection (Plane 0 or Plane 1) | ||
| 1 | 0 | The Flash addresses are the default one: order Plane 0, Plane 1 |
| 1 | The Flash addresses are exchanged: order Plane 1, Plane 0 | |
| Hardware Erase Function Lock (EFL) | ||
| [4:2] | 000 | Not locked, default |
| 110 | HW Erase function disabled, EFL bits are read-only (active only if security bit is set) | |
| Others | HW Erase function disabled, EFL bits can still be written by software (active only if security bit is set) | |
| Boot Mode | ||
| [8:5] | 0000 | Standard SAM-BA Monitor ( default). Not Secured. |
| 0011 | Standard Boot: Run the user application from the internal Flash at offset 0. Not Secured. | |
| 1001 | Secure SAM-BA Monitor. Secured. | |
| 1010 | Secure Boot (with fallback to Secure SAM-BA Monitor). Secured. | |
| 1100 | Secure Boot (Secure SAM-BA Monitor disabled). Secured. | |
| Others | Halt (the CPU runs an endless loop) | |