47.7.8.1 Sending Data with FIFO Enabled

When the Transmit FIFO is enabled, write access to MCSPI_TDR loads the Transmit FIFO.

The FIFO level is provided in the Transmit FIFO (TXFL) Level field in the FIFO Level register (MCSPI_FLR). If the FIFO can accept the number of data to be transmitted, there is no need to monitor MCSPI_SR.TDRE and the data can be successively written in MCSPI_TDR.

If the FIFO cannot accept the data due to insufficient space, wait for the TDRE flag to be set before writing the data in MCSPI_TDR.

When the space in the FIFO allows only a portion of the data to be written, the TDRE flag must be monitored before writing the remaining data.

Figure 47-21. Sending Data with FIFO