AN4623

1.4 Clocking Structure

In the demo design, there are two clock sources—the on-board 50 MHz oscillator and the on-board ZL30364 clock generation hardware.

On-board 50 MHz oscillator: This oscillator drives PLL that generates an 80 MHz clock for the Mi-V soft processor and peripherals. In this design, Mi-V processor runs at 80 MHz.
On-board ZL 30364 clock generation hardware: This hardware generates the reference clocks for VSC PHY, the IOD CDR fabric module, and CoreTSE.

The following figure shows the clocking structure of the demo design.

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