9 Revision History

• Updated the document for Libero® SoC v2022.3
• Updated Figure 1-2
• Updated Figure 1-3
• Updated Figure 1-4
• Updated Figure 1-7 and Figure 1-8
• Updated Figure 1-9
• Updated Figure 1-12
• Updated the design and .job filepath throughout the document

• The document was migrated to the Microchip template.
• The document number was updated to DS00004623 from 50200799.
• Updated the document for Libero® SoC v2022.1

The following is a summary of the changes made in this revision.

• Updated the document for Libero SoC v12.2.
• Removed the references to Libero version numbers.

The following is a summary of changes made in this revision.

• Updated the document for Libero SoC v12.1.
• The design uses a new IP PF_IOD_CDR_CCC. For more information, see PF_IOD_CDR_CCC_C0.

The following is a summary of changes made in this revision.

• Updated the document for Libero® SoC v12.0.
• Added Appendix 3: Multi-Lane 1G IOD CDR Design.
• Added Appendix 4: 1G Ethernet BASE-T and BASE-X Using Transceiver.